1. Field of the Invention
The present invention relates to a method of machining a wafer in a process in which devices such as semiconductor chips provided with metallic electrodes penetrating therethrough are obtained from the wafer provided with a plurality of the devices.
2. Description of the Related Art
In the semiconductor device technology in recent years, stack type semiconductor packages in which a plurality of semiconductor chips such as MCPs (multi chip packages) and SIPs (system in packages) are stacked have been utilized effectively for achieving a higher density, a smaller size and a thinner form. Methods for manufacturing such a semiconductor package includes a method in which semiconductor chips are stacked on a package substrate called “interposer”, the electrodes of the interposer and the semiconductor chips are, or the electrodes of the plurality of semiconductor chips stacked are, electrically connected through metallic wires, and then the semiconductor chips are resin molded onto the interposer.
In this method, however, the connection using the metallic wires has a problem in which the metallic wires may be deformed at the time of pouring a molding resin, to cause line breakage or short-circuit, or air remaining in the molding resin expands at the time of heating, to result in breakage. To obviate this problem, a technology has been developed in which the semiconductor chips are provided with penetrating electrodes penetrating therethrough in the thickness direction and making conduction to electrodes of their own, and, simultaneously with the stacking of the semiconductor chips, the penetrating electrodes are joined to each other to achieve the desired electrical connection (refer to Japanese Patent Laid-open No. 2005-136187 and Japanese Patent Laid-open No. 2006-012889).
In the subsequent processing of the semiconductor chips connected through the penetrating electrodes, the semiconductor wafer as an assembly yet to be split into the individual devices is thinned by grinding the back-side surface thereof, whereby the penetrating electrodes preliminarily formed correspondingly to the semiconductor chips are exposed on the back side of the wafer, and, further, the back-side surface is subjected to plasma etching or the like so that a small thickness thereof is removed, whereby the penetrating electrodes are left protruding from the back-side surface of the wafer. Such a protruding condition ensures that, at the time of stacking the semiconductor chip with a mating stacked member (a mating member to be stacked), the penetrating electrodes of the semiconductor chip can be connected to the electrodes of the mating stacked member in such a manner as to securely attain the electrical conduction. However, since the semiconductor wafer is processed to a very small thickness for reductions in size and thickness as above-mentioned, it is difficult to suitably handle the semiconductor wafer in transfer to an etching step after the thinning or in transfer to the subsequent splitting step, and the semiconductor wafer is susceptible to cracking, so that the yield thereof is lowered.
Besides, in stacking the semiconductor chip, it is needed to interpose an insulating film between the semiconductor chip and the mating stacked member exclusive of the electrodes. For this purpose, at the stage of the wafer, the back-side surface of the wafer is coated with a resin so as to bury the surroundings of the electrodes protruding on the back side of the wafer. As the resin in this case, a tacky resin for stacking and joining of a DAF (Die Attach Film) or the like, a thermoplastic resin which is not tacky at normal temperature but which becomes tacky when heated at the time of stacking, or the like resin is selected appropriately.
Japanese Patent Laid-open No. 2005-136187 above-mentioned discloses a method in which the back-side surface of a wafer is coated with a resin in such a thickness as not to cover the electrode parts, thereby forming an insulating film. However, in the case where, for example, the spin coating technique in general use as a method for forming an insulating film is adopted for forming the insulating film in this instance, the resin flows over top portions of the electrodes, resulting in that the electrodes might be covered with the resin, possibly leading to failure in conduction. Thus, the disclosed method is supposed to be impractical because it is difficult with the method to apply the resin to the back side of the wafer in a predetermined thickness in such a manner as to retain the condition where the top portions of the electrodes are exposed.